Hannah Williams (hannah.williams@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13124
-gerrit
commit 4c9a9f9472e393c6de6aeff00179550c6ad3944a Author: Divagar Mohandass divagar.mohandass@intel.com Date: Mon Oct 5 16:21:14 2015 +0530
intel/strago: EC_IN_RW gpio input configuration.
Configure EC_IN_RW signal as gpio input.
TEST=Boot to Chrome OS in normal mode and enter recovery mode use ctrl-d to switch to Dev mode.
Change-Id: I835a1c70d89ef2ab75c35233f889124b60bb64a3 Signed-off-by: Hannah Williams hannah.williams@intel.com Original-Reviewed-on: https://chromium-review.googlesource.com/304040 Original-Tested-by: Divagar Mohandass divagar.mohandass@intel.com Original-Reviewed-by: Gomathi Kumar gomathi.kumar@intel.com Original-Reviewed-by: Shobhit Srivastava shobhit.srivastava@intel.com Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Commit-Queue: Shobhit Srivastava shobhit.srivastava@intel.com --- src/mainboard/intel/strago/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c index 4fca2b9..b64d867 100644 --- a/src/mainboard/intel/strago/gpio.c +++ b/src/mainboard/intel/strago/gpio.c @@ -130,7 +130,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_OUT_HIGH, /* 75 SATA_GP0 */ GPIO_NC, /* 76 GPI SATA_GP1 */ - Native_M1, /* 77 SATA_LEDN */ + GPIO_INPUT_PU_20K, /* 77 SATA_LEDN */ GPIO_NC, /* 80 SATA_GP3 */ Native_M1, /* 81 NFC_DEV_WAKE , MF_SMB_CLK */ GPIO_INPUT_NO_PULL, /* 80 SATA_GP3,RAMID0 */