[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41786 )

Change subject: soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS
......................................................................

soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS

The config option APL_SKIP_SET_POWER_LIMITS was accidentally left out
during the set_power_limits refactor (SHA 2adb50d32e8). This patch
reinstates the config option which will cause APL boards to not set any
power limits.

TEST=util/abuild/abuild -p none -t siemens/mc_apl1 -a

Change-Id: Iec9f9f340d50a1212b6ef20c2c0e1b66385ae1b2
Signed-off-by: Tim Wawrzynczak 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41786
Tested-by: build bot (Jenkins) 
Reviewed-by: Werner Zeh 
Reviewed-by: Sumeet R Pawnikar 
---
M src/soc/intel/apollolake/chip.c
1 file changed, 8 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Werner Zeh: Looks good to me, approved
  Sumeet R Pawnikar: Looks good to me, approved

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index cc190ba..f9af4f4 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -322,10 +322,14 @@
    /* Allocate ACPI NVS in CBMEM */
    cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs_t));

-	config = config_of_soc();
-	/* Set RAPL MSR for Package power limits */
-	soc_config = &config->power_limits_config;
-	set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
+	if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) {
+		printk(BIOS_INFO, "Skip setting RAPL per configuration\n");
+	} else {
+		config = config_of_soc();
+		/* Set RAPL MSR for Package power limits */
+		soc_config = &config->power_limits_config;
+		set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
+	}

/*
    * FSP-S routes SCI to IRQ 9. With the help of this function you can