[coreboot-gerrit] [S] Change in coreboot[master]: mb/asus/p8z77-m: disable PCIe port 5

[Fabian Groffen (Code Review)]

Fabian Groffen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75107 )

Change subject: mb/asus/p8z77-m: disable PCIe port 5
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mb/asus/p8z77-m: disable PCIe port 5

There is nothing here to intialise.

Signed-off-by: Fabian Groffen 
Change-Id: I5de652bf414cae1cb8f3f84897258752eb28217b
---
M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
1 file changed, 13 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/75107/1

diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
index b83e538..8e08528 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
@@ -10,7 +10,7 @@
    		device pci 1c.1 off end # PCIe Port #2
    		device pci 1c.2 off end # PCIe Port #3
    		device pci 1c.3 off end # PCIe Port #4
-			device pci 1c.4 on  end	# PCIe Port #5 (PCIe x1 slot)
+			device pci 1c.4 off end	# PCIe Port #5 (PCIe x1 slot)
    		device pci 1c.5 on      # RTL8111F
    			subsystemid 0x1849 0x1e1a
    			device pci 00.0 on end  # make onboard