Aaron Durbin (adurbin@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4845
-gerrit
commit 5f748a2b8fc4c70f7078aa8b1ccc39edf37075f5 Author: Aaron Durbin adurbin@chromium.org Date: Mon Jan 27 15:52:47 2014 -0600
intel: fix microcode compilation failure in bootblock
When not building with CONFIG_SSE there are not enough registers for ROMCC to use for spilling. The previous changes to this file had too many local variables that needed to be tracked -- thus causing romcc compilation issues.
Change-Id: I3dd4b48be707f41ce273285e98ebd397c32a6a25 Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/cpu/intel/microcode/microcode.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index c823eb8..947dfd7 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -110,11 +110,10 @@ void intel_microcode_load_unlocked(const void *microcode_patch) const void *intel_microcode_find(void) { struct cbfs_file *microcode_file; - void *microcode_updates; + const struct microcode *ucode_updates; u32 eax, microcode_len; u32 pf, rev, sig, update_size; unsigned int x86_model, x86_family; - const struct microcode *m; msr_t msr;
#ifdef __PRE_RAM__ @@ -127,7 +126,7 @@ const void *intel_microcode_find(void) if (!microcode_file) return NULL;
- microcode_updates = CBFS_SUBHEADER(microcode_file); + ucode_updates = CBFS_SUBHEADER(microcode_file); microcode_len = ntohl(microcode_file->len);
/* CPUID sets MSR 0x8B iff a microcode update has been loaded. */ @@ -154,12 +153,11 @@ const void *intel_microcode_find(void) sig, pf, rev); #endif
- while (microcode_len >= sizeof(*m)) { - m = microcode_updates; + while (microcode_len >= sizeof(*ucode_updates)) { /* Newer microcode updates include a size field, whereas older * containers set it at 0 and are exactly 2048 bytes long */ - if (m->total_size) { - update_size = m->total_size; + if (ucode_updates->total_size) { + update_size = ucode_updates->total_size; } else { #if !defined(__ROMCC__) printk(BIOS_SPEW, "Microcode size field is 0\n"); @@ -175,10 +173,10 @@ const void *intel_microcode_find(void) break; }
- if ((m->sig == sig) && (m->pf & pf)) - return m; + if ((ucode_updates->sig == sig) && (ucode_updates->pf & pf)) + return ucode_updates;
- microcode_updates += update_size; + ucode_updates = (void *)((char *)ucode_updates + update_size); microcode_len -= update_size; }