[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Write EIP to secure S3

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42088 )

Change subject: soc/amd/picasso: Write EIP to secure S3
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42088/5/src/soc/amd/picasso/bootblo... 
File src/soc/amd/picasso/bootblock/bootblock.c:

https://review.coreboot.org/c/coreboot/+/42088/5/src/soc/amd/picasso/bootblo... 
PS5, Line 110: 	set_caching();
> After caching is magically (not really magic) faster?

This is about S3 resume path. The S3 MSR write snapshots core state including MTRRs and CR0. If you are writing S3 MSR after caching is enabled the cpu resumes with caching enabled.