[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Use SPI settings from EFS

[Raul Rangel (Code Review)]

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43303 )

Change subject: soc/amd/common: Use SPI settings from EFS
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43303/4/src/soc/amd/common/block/sp... 
File src/soc/amd/common/block/spi/fch_spi.c:

https://review.coreboot.org/c/coreboot/+/43303/4/src/soc/amd/common/block/sp... 
PS4, Line 92: 			   *spi_speed, *spi_speed);
> using the same value for all four is very likely wrong as the EFS only contains information on the S […]

The specific SPI chip we use on Trembyle:
Clock frequency for Read Data instruction (03h): 50 MHz
Clock frequency for QPI Read instructions (0Bh, EBh, 0Ch), with different dummy clocks: 104 MHz
Clock frequency for all other SPI/QPI instructions: 104 MHz