[coreboot-gerrit] Change in coreboot[master]: vc/amd/agesa/f15tn: test the memps0_freq and memps1_freq before using...

[Mike Banon (Code Review)]

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44508 )

Change subject: vc/amd/agesa/f15tn: test the memps0_freq and memps1_freq before using them
......................................................................

vc/amd/agesa/f15tn: test the memps0_freq and memps1_freq before using them

This fix helps to avoid a division by zero. Not tested on a real hardware yet.

Signed-off-by: Mike Banon 
Change-Id: I0189b404bc87e14e5d0d68eca39a837cd99ffa6f
---
M src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c
1 file changed, 22 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/44508/1

diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c
index 75ec2fb..8f600f8 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c
@@ -279,9 +279,10 @@
  *
  *
  * @param[in]   Gfx               Pointer to global GFX configuration
- *
+ * @retval      AGESA_SUCCESS     Configuration successfully applied
+ * @retval      AGESA_ERROR       Requested configuration not supported
  */
-STATIC VOID
+STATIC AGESA_STATUS
 GfxGmcInitializeSequencerTN (
   IN      GFX_PLATFORM_CONFIG   *Gfx
   )
@@ -331,8 +332,19 @@
   //scale_mp0 = sclk_max_freq / memps0_freq
   //scale_mp1 = sclk_max_freq / memps1_freq
   //Multiply it by 100 to avoid dealing with floating point values
-  scale_mp0 = (GfxLibGetMaxSclk (GnbLibGetHeader (Gfx)) * 100) / memps0_freq;
-  scale_mp1 = (GfxLibGetMaxSclk (GnbLibGetHeader (Gfx)) * 100) / memps1_freq;
+  if (memps0_freq != 0)
+    scale_mp0 = (GfxLibGetMaxSclk (GnbLibGetHeader (Gfx)) * 100) / memps0_freq;
+  else {
+    IDS_HDT_CONSOLE (GNB_TRACE, "  ERROR! memps0_freq is 0 at GfxGmcInitializeSequencerTN\n");
+    return AGESA_ERROR;
+  }
+
+  if (memps1_freq != 0)
+    scale_mp1 = (GfxLibGetMaxSclk (GnbLibGetHeader (Gfx)) * 100) / memps1_freq;
+  else {
+    IDS_HDT_CONSOLE (GNB_TRACE, "  ERROR! memps1_freq is 0 at GfxGmcInitializeSequencerTN\n");
+    return AGESA_ERROR;
+  }

GnbRegisterReadTN (TYPE_GMM , 0x2774 , &ex1047.Value, 0, GnbLibGetHeader (Gfx));
   GnbRegisterReadTN (TYPE_GMM , 0x2778 , &ex1048.Value, 0, GnbLibGetHeader (Gfx));
@@ -429,6 +441,8 @@
   }
   GnbRegisterWriteTN (TYPE_GMM , 0x2004 , &ex1012.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx));
   GnbRegisterWriteTN (TYPE_GMM , 0x2214 , &ex1034.Value, GNB_REG_ACC_FLAG_S3SAVE, GnbLibGetHeader (Gfx));
+
+  return AGESA_SUCCESS;
 }

/*----------------------------------------------------------------------------------------*/
@@ -531,7 +545,10 @@
      GNB_TABLE_FLAGS_FORCE_S3_SAVE,
      GnbLibGetHeader (Gfx)
      );
-   GfxGmcInitializeSequencerTN (Gfx);
+   if (GfxGmcInitializeSequencerTN (Gfx) == AGESA_ERROR) {
+     ASSERT  (FALSE);
+     return  AGESA_ERROR;
+   };
    GfxGmcInitializeFbLocationTN (Gfx);
    GfxGmcSecureGarlicAccessTN (Gfx);
    GfxGmcInitializeC6LocationTN (Gfx);