[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Add CdClock frequency config

[Simon Yang (Code Review)]

Attention is currently required from: Jamie Chen, Henry Sun, Tim Wawrzynczak, Paul Menzel, Ren Kuo, Angel Pons, Kane Chen, Patrick Rudolph.
Simon Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60009 )

Change subject: soc/intel/jasperlake: Add CdClock frequency config
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Patch Set 17:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/60009/comment/145804c9_eccd2471 
PS16, Line 7: CdClock
> nit: `CdClock frequency`

Done

https://review.coreboot.org/c/coreboot/+/60009/comment/e9633dff_74b9278d 
PS16, Line 9: This dev tree config controls the CdClock for Jasper Lake.
> I'd reword and expand this a bit, stating what `CdClock` means and removing the redundant `for Jaspe […]

Done

File src/mainboard/google/dedede/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/60009/comment/05a84d32_3c437d01 
PS16, Line 208: # Core Display Clock Frequency selection
              : 	register "CdClock" = "0xff"
> With the changes I've suggested in my other comments, this is no longer needed.

Done