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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61568
to look at the new patch set (#2).
Change subject: soc/amd/*/i2c: factor out common I2C pad configuration ......................................................................
soc/amd/*/i2c: factor out common I2C pad configuration
The I2C pad control registers of Picasso and Cezanne are identical and the one of Sabrina is a superset of it, so factor out the functionality. To avoid having devicetree settings that contain raw register bits, the i2c_pad_control struct is introduced and used. The old Picasso code for this had the RX level hard-coded for 3.3V I2C interfaces, so keep it this way in this patch but add a TODO for future improvements.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I1d70329644b68be3c4a1602f748e09db20cf6de1 --- M src/mainboard/amd/chausie/devicetree.cb M src/mainboard/amd/majolica/devicetree.cb M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/i2c.c M src/soc/amd/cezanne/include/soc/southbridge.h M src/soc/amd/common/block/i2c/Kconfig M src/soc/amd/common/block/i2c/Makefile.inc A src/soc/amd/common/block/i2c/i2c_pad_ctrl.c A src/soc/amd/common/block/i2c/i2c_pad_def.h M src/soc/amd/common/block/include/amdblocks/i2c.h M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/i2c.c M src/soc/amd/picasso/include/soc/southbridge.h M src/soc/amd/sabrina/Kconfig M src/soc/amd/sabrina/chip.h M src/soc/amd/sabrina/i2c.c M src/soc/amd/sabrina/include/soc/southbridge.h 19 files changed, 134 insertions(+), 145 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/61568/2