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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52489
to look at the new patch set (#11).
Change subject: sb/intel/lynxpoint: Add SerialIO UART console support ......................................................................
sb/intel/lynxpoint: Add SerialIO UART console support
Derived from Broadwell and adapted to follow what soc/intel does. Note that SERIALIO_UART_CONSOLE is meant to be selected from the mainboards which expose a SerialIO UART. UART_FOR_CONSOLE also needs to be set in mainboard Kconfig accordingly.
It is possible that some of the UART configuration steps in bootblock are unnecessary. However, some of the steps turn off power management features and others are undocumented: omitting them could cause weird issues.
Finally, add a config file to ensure the code gets build-tested.
Tested on out-of-tree Compal LA-A992P, SerialIO UART 0 can be used to receive coreboot and SeaBIOS logs.
Change-Id: Ifb3460dd50ed03421a38f03c80f91ae9fd604022 Signed-off-by: Angel Pons th3fanbus@gmail.com --- A configs/config.google_panther.pch_serialio_uart M src/southbridge/intel/lynxpoint/Kconfig M src/southbridge/intel/lynxpoint/Makefile.inc M src/southbridge/intel/lynxpoint/bootblock.c M src/southbridge/intel/lynxpoint/pch.h M src/southbridge/intel/lynxpoint/serialio.c A src/southbridge/intel/lynxpoint/uart.c A src/southbridge/intel/lynxpoint/uart_init.c 8 files changed, 125 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/52489/11