[coreboot-gerrit] Change in coreboot[master]: AGESA, binaryPI: implement C bootblock

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )

Change subject: AGESA, binaryPI: implement C bootblock
......................................................................

Patch Set 31:

(1 comment)

https://review.coreboot.org/c/coreboot/+/36914/28/src/drivers/amd/agesa/boot... 
File src/drivers/amd/agesa/bootblock.c:

https://review.coreboot.org/c/coreboot/+/36914/28/src/drivers/amd/agesa/boot... 
PS28, Line 40: 	set_var_mtrr(mtrr, OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE,
> Maybe %edx, I'm a noob when it comes to clobbers... […]

Somehow I was thinking this is calling get_free_var_mtrr() while it clearly is not doing that. I still think it is better to use the same MTRR as the original amd_initmmio() did. A separate change with argumentation is required to change that, but we really should have no need to change it.

Note that for amd/stoneyridge seems to have moved MTRR programming outside vendorcode so we cannot use it as a guide with our old bloba.