Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47290 )
Change subject: mb/intel/adlrvp: Configure the HPD GPIO's ......................................................................
mb/intel/adlrvp: Configure the HPD GPIO's
This patch configures the HPD1 and HPD2 GPIO's.
BUG=b:170607415 TEST=Built and booted adlrvp. Verified the hotplug functionality is working.
Change-Id: Ied2d4c56220212a15103e9a2fbd01ce6f0811a74 Signed-off-by: V Sowmya v.sowmya@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47290 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c b/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c index e142e88..c7029fc1 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c @@ -277,6 +277,10 @@ PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2), PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2),
+ /* HPD_1 (A19) and HPD_2 (A20) pins */ + PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), + /* IMGCLKOUT */ PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),