[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Drop 'or zero' instances

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38339 )

Change subject: nb/intel/sandybridge: Drop 'or zero' instances
......................................................................

nb/intel/sandybridge: Drop 'or zero' instances

Change-Id: Icd0dfdf311ac141992ec6a6026ca92e54e8d2094
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 6 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/38339/1

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index fc4e6f9..795775c 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1771,8 +1771,7 @@
    		/* DRAM command RD */
    		MCHBAR32(IOSAV_n_SP_CMD_CTL_ch(channel, 1)) = 0x1f105;
    		MCHBAR32(IOSAV_n_SUBSEQ_CTL_ch(channel, 1)) = 0x4041003;
-			MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) =
-				(slotrank << 24) | 0;
+			MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) = slotrank << 24;
    		MCHBAR32(IOSAV_n_ADDR_UPD_ch(channel, 1)) = 0;

/* DRAM command RD */
@@ -1821,8 +1820,7 @@
    		/* DRAM command RD */
    		MCHBAR32(IOSAV_n_SP_CMD_CTL_ch(channel, 1)) = 0x1f105;
    		MCHBAR32(IOSAV_n_SUBSEQ_CTL_ch(channel, 1)) = 0x4041003;
-			MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) =
-				(slotrank << 24) | 0;
+			MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) = slotrank << 24;
    		MCHBAR32(IOSAV_n_ADDR_UPD_ch(channel, 1)) = 0;

/* DRAM command RD */
@@ -2562,8 +2560,7 @@
    		/* DRAM command RD */
    		MCHBAR32(IOSAV_n_SP_CMD_CTL_ch(channel, 1)) = 0x1f105;
    		MCHBAR32(IOSAV_n_SUBSEQ_CTL_ch(channel, 1)) = 0x4041003;
-			MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) =
-				(slotrank << 24) | 0;
+			MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) = slotrank << 24;
    		MCHBAR32(IOSAV_n_ADDR_UPD_ch(channel, 1)) = 0;

/* DRAM command RD */
@@ -2617,7 +2614,7 @@
    		MCHBAR32(IOSAV_n_SP_CMD_CTL_ch(channel, 1)) = 0x1f105;
    		MCHBAR32(IOSAV_n_SUBSEQ_CTL_ch(channel, 1)) = 0x4041003;
    		MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) =
-				(slotrank << 24) | 0;
+				(slotrank << 24);
    		MCHBAR32(IOSAV_n_ADDR_UPD_ch(channel, 1)) = 0;

/* DRAM command RD */
@@ -3069,13 +3066,13 @@
    	/* DRAM command WR */
    	MCHBAR32(IOSAV_n_SP_CMD_CTL_ch(channel, 1)) = 0x0001f201;
    	MCHBAR32(IOSAV_n_SUBSEQ_CTL_ch(channel, 1)) = 0x08281064;
-		MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) = 0x00000000 | (slotrank << 24);
+		MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 1)) = slotrank << 24;
    	MCHBAR32(IOSAV_n_ADDR_UPD_ch(channel, 1)) = 0x00000242;

/* DRAM command RD */
    	MCHBAR32(IOSAV_n_SP_CMD_CTL_ch(channel, 2)) = 0x0001f105;
    	MCHBAR32(IOSAV_n_SUBSEQ_CTL_ch(channel, 2)) = 0x04281064;
-		MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 2)) = 0x00000000 | (slotrank << 24);
+		MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(channel, 2)) = slotrank << 24;
    	MCHBAR32(IOSAV_n_ADDR_UPD_ch(channel, 2)) = 0x00000242;

/* DRAM command PRE */