[coreboot-gerrit] Change in coreboot[master]: mb/lenovo/x1/devicetree: Rebalance against x220 one

[Peter Lemenkov (Code Review)]

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37603 )

Change subject: mb/lenovo/x1/devicetree: Rebalance against x220 one
......................................................................

mb/lenovo/x1/devicetree: Rebalance against x220 one

Change-Id: Ib009c33d8393d4a76036941ac77965dc12e4ec3e
Signed-off-by: Peter Lemenkov 
---
M src/mainboard/lenovo/x220/variants/x1/overridetree.cb
1 file changed, 0 insertions(+), 22 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/37603/1

diff --git a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb
index a08a12f..68a70f0 100644
--- a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb
+++ b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb
@@ -15,31 +15,15 @@
    device domain 0 on
    	subsystemid 0x17aa 0x21e8 inherit

-		device pci 00.0 on end # host bridge
-		device pci 02.0 on end # vga controller
-
    	chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
    		# Enable SATA ports 0 (HDD bay) & 2 (msata) & 3 (esatap)
    		register "sata_port_map" = "0x1d"
    		# X1 does not have ExpressCard slot
    		register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"

-			device pci 1a.0 on end # USB2 EHCI #2
-			device pci 1b.0 on end # High Definition Audio
    		device pci 1c.0 off end # PCIe Port #1
-			device pci 1c.1 on end # PCIe Port #2 (wlan)
    		device pci 1c.2 off end # PCIe Port #3
    		device pci 1c.3 off end # PCIe Port #4
-			device pci 1c.4 on
-				chip drivers/ricoh/rce822 # Ricoh cardreader
-					device pci 00.0 on end
-				end
-			end # PCIe Port #5 (SD)
-			device pci 1c.5 off end # PCIe Port #6
-			device pci 1c.6 on end # PCIe Port #7
-			device pci 1c.7 off end # PCIe Port #8
-			device pci 1d.0 on end # USB2 EHCI #1
-			device pci 1e.0 off end # PCI bridge
    		device pci 1f.0 on #LPC bridge
    			chip ec/lenovo/h8
    				register "config2" = "0xe0"
@@ -50,14 +34,8 @@

register "event5_enable" = "0x3c"
    				register "evente_enable" = "0x3d"
-
-					# BDC detection is broken on this board:
-					register "has_bdc_detection" = "0"
    			end
    		end # LPC bridge
-			device pci 1f.2 on end # SATA Controller 1
-			device pci 1f.3 on end # SMBus
-			device pci 1f.6 on end # Thermal
    	end
    end
 end