[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add support for UARTs on PCH-H

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40405 )

Change subject: soc/intel/cannonlake: Add support for UARTs on PCH-H
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Patch Set 9:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40405/9/src/soc/intel/cannonlake/pc... 
File src/soc/intel/cannonlake/pch_h.c:

https://review.coreboot.org/c/coreboot/+/40405/9/src/soc/intel/cannonlake/pc... 
PS9, Line 66: ",
> according to the ACPI spec 6.1 Chapter 6.1 […]

That would be hard. For ACPI mode, the hardcoded _ADR should be removed.
So the generally encouraged way is to always have a runtime driver and let
it either emit _ADR or _HID depending on the mode.

For the rest of the driver, it depends on each object. For instance, _CRS
should only be necessary in ACPI mode (unless the PCI device is not fully
PCI compliant).