Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37308 )
Change subject: soc/intel/cannonlake: Refactor pch_early_init() code ......................................................................
Patch Set 3:
(5 comments)
https://review.coreboot.org/c/coreboot/+/37308/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37308/2//COMMIT_MSG@11 PS2, Line 11: TCO
Fits on the line above.
Done
https://review.coreboot.org/c/coreboot/+/37308/2//COMMIT_MSG@11 PS2, Line 11: SMBUS
SMBus
Done
https://review.coreboot.org/c/coreboot/+/37308/2//COMMIT_MSG@14 PS2, Line 14: Renamed
Rename
Done
https://review.coreboot.org/c/coreboot/+/37308/2/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/pch.c:
https://review.coreboot.org/c/coreboot/+/37308/2/src/soc/intel/cannonlake/ro... PS2, Line 22: Programming
Program
Done
https://review.coreboot.org/c/coreboot/+/37308/2/src/soc/intel/cannonlake/ro... PS2, Line 25: Enable
enable
Done