Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4612
-gerrit
commit 834370777e7f37d1ced043097f5956bf598a410a Author: Vladimir Serbinenko phcoder@gmail.com Date: Sat Jan 4 20:58:55 2014 +0100
MRC cache: determine flash size on runtime
It should be possible to put coreboot compiled for smaller chip by putting it at the end of bigger chip. We already have chip size in flash->size. Use it.
Tested on Lenovo X230.
Change-Id: If8ff03ed72671a9f2745ed4e759a04e83aa7cc37 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/northbridge/intel/haswell/mrccache.c | 8 ++++---- src/northbridge/intel/sandybridge/mrccache.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c index f60d0f7..88dbf7f 100644 --- a/src/northbridge/intel/haswell/mrccache.c +++ b/src/northbridge/intel/haswell/mrccache.c @@ -34,8 +34,8 @@ #endif
/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(void *p) { - return ((u32)p + CONFIG_ROM_SIZE); +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { + return ((u32)p + flash->size); }
static struct mrc_data_container *next_mrc_block( @@ -212,7 +212,7 @@ static void update_mrc_cache(void *unused) "Need to erase the MRC cache region of %d bytes at %p\n", cache_size, cache_base);
- flash->erase(flash, to_flash_offset(cache_base), cache_size); + flash->erase(flash, to_flash_offset(flash, cache_base), cache_size);
/* we will start at the beginning again */ cache = cache_base; @@ -220,7 +220,7 @@ static void update_mrc_cache(void *unused) // 4. write mrc data with flash->write() printk(BIOS_DEBUG, "Finally: write MRC cache update to flash at %p\n", cache); - flash->write(flash, to_flash_offset(cache), + flash->write(flash, to_flash_offset(flash, cache), current->mrc_data_size + sizeof(*current), current); }
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index e19d2c5..b8120a8 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -34,8 +34,8 @@ #endif
/* convert a pointer to flash area into the offset inside the flash */ -static inline u32 to_flash_offset(void *p) { - return ((u32)p + CONFIG_ROM_SIZE); +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { + return ((u32)p + flash->size); }
static struct mrc_data_container *next_mrc_block( @@ -212,7 +212,7 @@ static void update_mrc_cache(void *unused) "Need to erase the MRC cache region of %d bytes at %p\n", cache_size, cache_base);
- flash->erase(flash, to_flash_offset(cache_base), cache_size); + flash->erase(flash, to_flash_offset(flash, cache_base), cache_size);
/* we will start at the beginning again */ cache = cache_base; @@ -220,7 +220,7 @@ static void update_mrc_cache(void *unused) // 4. write mrc data with flash->write() printk(BIOS_DEBUG, "Finally: write MRC cache update to flash at %p\n", cache); - flash->write(flash, to_flash_offset(cache), + flash->write(flash, to_flash_offset(flash, cache), current->mrc_data_size + sizeof(*current), current); }