Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/20995
Change subject: mb/intel/rvp7: use the correct pad reset config for GPP ......................................................................
mb/intel/rvp7: use the correct pad reset config for GPP
GPIO pad reset configs for GPP and GPD pads are not same and SoC definitions have been updated use the appropriate one.
Change-Id: I7720ddd3ef6749610411ecf33a56c0c24994fdfc Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- M src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/20995/1
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h index 2233339..7aaed9a 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h @@ -64,7 +64,7 @@ /* LPC_CLKRUN */ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* PCH_CLK_PCI_TPM */ PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), /* PCH_LPC_CLK */ PAD_CFG_GPI_APIC(GPP_A11, NONE, DEEP), -/* ISH_KB_PROX_INT */ PAD_CFG_GPO(GPP_A12, 1, RSMRST), +/* ISH_KB_PROX_INT */ PAD_CFG_GPO(GPP_A12, 1, GPP_RSMRST), /* PCH_SUSPWRACB */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), /* PCH_SUSACK */ PAD_CFG_NF(GPP_A15, 20K_PD, DEEP, NF1), /* SD_1P8_SEL */ PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), @@ -144,7 +144,7 @@ /* SPI_TPM_IRQ */ PAD_CFG_GPI_APIC(GPP_E0, 20K_PD, DEEP), /* SATAXPCIE1 */ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* SSD_PEDET */ PAD_CFG_GPI(GPP_E2, NONE, DEEP), -/* CPU_GP0 */ PAD_CFG_GPO(GPP_E3, 1, RSMRST), +/* CPU_GP0 */ PAD_CFG_GPO(GPP_E3, 1, GPP_RSMRST), /* SATA_DEVSLP1 */ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* SATA_DEVSLP2 */ PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),