[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Enable VT-d and generate DMAR Table

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47506 )

Change subject: soc/intel/jasperlake: Enable VT-d and generate DMAR Table
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47506/1/src/soc/intel/jasperlake/ro... 
File src/soc/intel/jasperlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/47506/1/src/soc/intel/jasperlake/ro... 
PS1, Line 85: m_cfg->VtdIopEnable = 0x1;
Don't we need to configure VtdBaseAddress[2] when this is enabled? I see references to it in FSP codebase.