[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/../../timer: Calculate TSC frequency based on CPUID 0x15

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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32283 )

Change subject: soc/intel/../../timer: Calculate TSC frequency based on CPUID 0x15
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/32283/1/src/soc/intel/common/block/timer/tim... 
File src/soc/intel/common/block/timer/timer.c:

https://review.coreboot.org/#/c/32283/1/src/soc/intel/common/block/timer/tim... 
PS1, Line 51:  * EBX Bit 31-0 : An unsigned interger which is the numerator of the
'interger' may be misspelled - perhaps 'integer'?