Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36572 )
Change subject: soc/intel/icelake: lockdown: lock global reset ......................................................................
soc/intel/icelake: lockdown: lock global reset
There are four chipsets selecting PMC_GLOBAL_RESET_ENABLE_LOCK but only one (apollolake) is actually calling the code. Add the missing call.
Change-Id: I3e450a473ccdf99221e82e0f857879039d78991b Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/36572 Reviewed-by: Aaron Durbin adurbin@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/icelake/lockdown.c 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/soc/intel/icelake/lockdown.c b/src/soc/intel/icelake/lockdown.c index 85a93c7..b92d1c5 100644 --- a/src/soc/intel/icelake/lockdown.c +++ b/src/soc/intel/icelake/lockdown.c @@ -15,6 +15,7 @@
#include <device/mmio.h> #include <intelblocks/cfg.h> +#include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> #include <soc/pm.h>
@@ -60,6 +61,8 @@ pmc_lock_pmsync(); /* Lock down ABASE and sleep stretching policy */ pmc_lock_abase(); + /* Make sure payload/OS can't trigger global reset */ + pmc_global_reset_disable_and_lock();
if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) pmc_lock_smi();