Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47431 )
Change subject: soc/intel/common: Generate the CSE RW metadata and add to FW_MAIN_A/B ......................................................................
Patch Set 7:
(4 comments)
https://review.coreboot.org/c/coreboot/+/47431/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47431/7//COMMIT_MSG@12 PS7, Line 12: m nit: uppercase M
https://review.coreboot.org/c/coreboot/+/47431/7/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47431/7/src/soc/intel/common/block/... PS7, Line 16: CONFIG_SOC_INTEL_CSE_RW_VERSION If CONFIG_SOC_INTEL_CSE_RW_VERSION is "" and CONFIG_SOC_INTEL_CSE_RW_FILE is not, then we need to throw and error here. Please see my comment on earlier patch about adding a Kconfig for SOC_INTEL_CSE_RW_UPDATE. That Kconfig can be used to add checks to ensure both CONFIG_SOC_INTEL_CSE_RW_VERSION and CONFIG_SOC_INTEL_CSE_RW_FILE are not empty. If they are empty, this Makefile should throw an error.
https://review.coreboot.org/c/coreboot/+/47431/7/src/soc/intel/common/block/... PS7, Line 18: = := here and for rest of the version variables.
https://review.coreboot.org/c/coreboot/+/47431/7/src/soc/intel/common/block/... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/47431/7/src/soc/intel/common/block/... PS7, Line 81: SHA256_DIGEST_SIZE nit: I think you can use `VB2_SHA256_DIGEST_SIZE` and include vb2_api.h since it already provides this definition.