Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/29071
Change subject: soc/amd/stoneyridge: Cleanup procedure pci_ehci_dbg_dev() ......................................................................
soc/amd/stoneyridge: Cleanup procedure pci_ehci_dbg_dev()
Stoneyridge does not have devices 0x13 and 0x16. PCI_DEV(0, 0x12, 0) can be replaced by SOC_EHCI1_DEV.
BUG=b:117637735 TEST=Build grunt.
Change-Id: I95eb2b7be53efe6a7cedf9a2a515d608f2643cf7 Signed-off-by: Richard Spiegel richard.spiegel@silverbackltd.com --- M src/soc/amd/stoneyridge/enable_usbdebug.c 1 file changed, 1 insertion(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/29071/1
diff --git a/src/soc/amd/stoneyridge/enable_usbdebug.c b/src/soc/amd/stoneyridge/enable_usbdebug.c index 5220457..f8d879e 100644 --- a/src/soc/amd/stoneyridge/enable_usbdebug.c +++ b/src/soc/amd/stoneyridge/enable_usbdebug.c @@ -28,12 +28,7 @@ outb(0xef, PM_INDEX); outb(0x7f, PM_DATA);
- if (hcd_idx == 3) - return PCI_DEV(0, 0x16, 0); - else if (hcd_idx == 2) - return PCI_DEV(0, 0x13, 0); - else - return PCI_DEV(0, 0x12, 0); + return SOC_EHCI1_DEV; }
void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)