Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34658 )
Change subject: soc/intel/common/block/acpi: Add provision to inject PCI PIRQ ACPI mapping ......................................................................
Patch Set 4:
(3 comments)
https://review.coreboot.org/c/coreboot/+/34658/3/src/soc/intel/common/block/... File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/34658/3/src/soc/intel/common/block/... PS3, Line 232: #if CONFIG(SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE)
why does it use the preprocessor?
To selectively make generate_pci_pirq_entries available based on the config. The config is tied up with creating the irq configuration data in common irq.c file. and generate_pci_pirq_entries would use the same data to generate ACPI package out of it.
If the SOC selects the SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE, only then the irq common driver would generate the irq configuration package based on UIRQ configurattion rules.
https://review.coreboot.org/c/coreboot/+/34658/3/src/soc/intel/common/block/... PS3, Line 242: acpigen_write_scope("\");
nit: blank line after return;
Done
https://review.coreboot.org/c/coreboot/+/34658/3/src/soc/intel/common/block/... PS3, Line 284: void southbridge_inject_dsdt(struct device *device)
nit: blank line above
Done