[coreboot-gerrit] Change in coreboot[master]: vc/intel/fsp/fsp2_0/cpx_sp: Add DIMM definition in SystemMemoryMapHob

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44847 )

Change subject: vc/intel/fsp/fsp2_0/cpx_sp: Add DIMM definition in SystemMemoryMapHob
......................................................................

vc/intel/fsp/fsp2_0/cpx_sp: Add DIMM definition in SystemMemoryMapHob

Most of them are needed for SMBIOS type 17 creation.

Tested=With FSP WW36 verified the printed hob values match
with FSP hob data.

Change-Id: I02f4600f1be39e2576d7c84a5a6b6672ebb7034b
Signed-off-by: Johnny Lin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44847
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
1 file changed, 48 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
index f85c4ff..50ead77 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
@@ -58,6 +58,9 @@
 #define MEM_TYPE_RESERVED (1 << 8)
 #define MEM_ADDR_64MB_SHIFT_BITS 26

+#define NGN_MAX_SERIALNUMBER_STRLEN 4
+#define NGN_MAX_PARTNUMBER_STRLEN 20
+#define NGN_FW_VER_LEN 4
 //
 //  System Memory Map HOB information
 //
@@ -85,6 +88,46 @@
    UINT32   ElementSize;
 } SYSTEM_MEMORY_MAP_ELEMENT;

+typedef struct DimmDevice {
+	UINT8    reserved1[2];
+	UINT8    DcpmmPresent;
+	UINT8    reserved2[1];
+	UINT8    NumRanks;
+	UINT8    reserved3[1];
+	UINT8    actKeyByte2;
+	UINT8    reserved4[4];
+	UINT16   nonVolCap;
+	UINT16   DimmSize;
+	UINT8    reserved5[4];
+	UINT16   SPDMMfgId;				    // Module Mfg Id from SPD
+	UINT16   VendorID;
+	UINT16   DeviceID;
+	UINT8    reserved6[22];
+	UINT8    serialNumber[NGN_MAX_SERIALNUMBER_STRLEN]; // Serial Number
+	UINT8    PartNumber[NGN_MAX_PARTNUMBER_STRLEN];     // Part Number
+	UINT8    FirmwareVersionStr[NGN_FW_VER_LEN];        // Used to update the SMBIOS TYPE 17
+	UINT8    reserved7[23];
+	UINT16   SubsystemVendorID;
+	UINT16   SubsystemDeviceID;
+	UINT8    reserved8[4];
+	UINT8    DimmSku;				    // Dimm SKU info
+	UINT8    reserved9[3];
+	INT32    commonTck;
+	UINT8    EnergyType;
+	UINT8    reserved10[1];
+	UINT16   SPDRegVen;				    // Register Vendor ID in SPD
+} MEMMAP_DIMM_DEVICE_INFO_STRUCT;
+
+struct ChannelDevice {
+	UINT8    reserved1[15];
+	MEMMAP_DIMM_DEVICE_INFO_STRUCT    DimmInfo[MAX_IMC];
+};
+
+typedef struct socket {
+	UINT8    reserved1[1110];
+	struct   ChannelDevice ChannelInfo[MAX_CH];
+} MEMMAP_SOCKET;
+
 /* NOTE - Reserved sizes need to be calibrated if any of the above #define values change */
 typedef struct SystemMemoryMapHob {
   UINT8    reserved1[61];
@@ -101,16 +144,17 @@
   UINT8    NumChPerMC;
   UINT8    numberEntries;                         // Number of Memory Map Elements
   SYSTEM_MEMORY_MAP_ELEMENT Element[(MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES) + MAX_FPGA_REMOTE_SAD_RULES];
-
-  UINT8    reserved3[24551];
+  UINT8    reserved3[2212];
+  MEMMAP_SOCKET Socket[MAX_SOCKET];
+  UINT8    reserved4[1603];

UINT16  BiosFisVersion;                              // Firmware Interface Specification version currently supported by BIOS

-  UINT8    reserved4[24];
+  UINT8    reserved5[24];

UINT32   MmiohBase;                                   // MMIOH base in 64MB granularity

-  UINT8    reserved5[2];
+  UINT8    reserved6[2];

} SYSTEM_MEMORY_MAP_HOB;