Mariusz Szafranski has uploaded this change for review. ( https://review.coreboot.org/21693
Change subject: configs: Add intel/harcuvar FSP 2.0 configurations ......................................................................
configs: Add intel/harcuvar FSP 2.0 configurations
Add Intel Harcuvar CRB FSP 2.0 configuration.
Change-Id: I60ec6921eca17a910cd1b9f8b0b86a1a1bf9bbea Signed-off-by: Mariusz Szafranski mariuszx.szafranski@intel.com --- A configs/config.intel_harcuvar 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/21693/1
diff --git a/configs/config.intel_harcuvar b/configs/config.intel_harcuvar new file mode 100644 index 0000000..1d1ecc0 --- /dev/null +++ b/configs/config.intel_harcuvar @@ -0,0 +1,14 @@ +CONFIG_COLLECT_TIMESTAMPS=y +CONFIG_VENDOR_INTEL=y +CONFIG_CBFS_SIZE=0x800000 +CONFIG_BOARD_INTEL_HARCUVAR=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_M_FILE="../intel/fsp/denverton_ns/DENVERTON-NS_FSP_M.fd" +CONFIG_FSP_S_FILE="../intel/fsp/denverton_ns/DENVERTON-NS_FSP_S.fd" +CONFIG_ENABLE_HSUART=y +CONFIG_CPU_MICROCODE_HEADER_FILES="../intel/cpu/denverton_ns/microcode/microcode_blob.h" +CONFIG_UART_PCI_ADDR=0x8000d000 +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER=y +CONFIG_FSP_T_FILE="../intel/fsp/denverton_ns/DENVERTON-NS_FSP_T.fd" +CONFIG_FSP_CAR=y