Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48444 )
Change subject: soc/intel/elkhartlake: Update PCI device definition
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Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/48444/1/src/soc/intel/elkhartlake/i...
File src/soc/intel/elkhartlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/48444/1/src/soc/intel/elkhartlake/i...
PS1, Line 85: define PCH_DEV_CSE_3 _PCH_DEV(CSE, 4)
: #define PCH_DEV_CSE_4 _PCH_DEV(CSE, 5)
I just checked BIOS source codes and other projects, seems like the numbering in EDS should starts f […]
But are you sure that 2 and 3 is missing? How could that be explained?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ibf7ef3c30deab5398361bc18fc63ac39fc914d8c
Gerrit-Change-Number: 48444
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