[coreboot-gerrit] Change in coreboot[master]: mb/google/zork/var/vilboz: disable FCH_48MHZ_CLK_OUT for LTE sku

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48556 )

Change subject: mb/google/zork/var/vilboz: disable FCH_48MHZ_CLK_OUT for LTE sku
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Patch Set 4:

(2 comments)
> Patch Set 4:
>
> have you verified that this won't impact audio? this gets enabled in the acp initialization and it has some comment that this is internally routed to the I2S block

LTE sku will have external clock source chip. Please refer the issue.

https://review.coreboot.org/c/coreboot/+/48556/4//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48556/4//COMMIT_MSG@9 
PS4, Line 9: Disable FCH_48MHZ_CLK_OUT for LTE sku in next build.
> Could you add explanation why 48MHz clock output needs to enabled from reset to end of ramstage? Wit […]

Will try mainboard_init as well. Not sure this value will be override by FSP. If not, I think mainboard_init is fine.

https://review.coreboot.org/c/coreboot/+/48556/4/src/mainboard/google/zork/v... 
File src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h:

https://review.coreboot.org/c/coreboot/+/48556/4/src/mainboard/google/zork/v... 
PS4, Line 84: /* Disable FCH 48MHz clock for LTE SKU. */
> add more comment like :for vilboz LTE sku.

change function name to variant_mainboard_final