HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33330
Change subject: device/pci_rom.c: Fix indent for 'if' statement and remove unneeded 'else' ......................................................................
device/pci_rom.c: Fix indent for 'if' statement and remove unneeded 'else'
'else' is not needed after a 'break' or 'return'.
Change-Id: Ie9adb60323742d379cc4ad0af069a793b9ddd79b Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/device/pci_rom.c 1 file changed, 21 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/33330/1
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 2dbfb51..f1f6c41 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -56,32 +56,31 @@ printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n", dev_path(dev), rom_header); } else if (!CONFIG(ON_DEVICE_ROM_LOAD)) { - printk(BIOS_DEBUG, "PCI Option ROM loading disabled " - "for %s\n", dev_path(dev)); + printk(BIOS_DEBUG, "PCI Option ROM loading disabled " + "for %s\n", dev_path(dev)); + return NULL; + } + uintptr_t rom_address; + + rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS); + + if (rom_address == 0x00000000 || rom_address == 0xffffffff) { +#if CONFIG(BOARD_EMULATION_QEMU_X86) + if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) + rom_address = 0xc0000; + else +#endif return NULL; } else { - uintptr_t rom_address; - - rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS); - - if (rom_address == 0x00000000 || rom_address == 0xffffffff) { -#if CONFIG(BOARD_EMULATION_QEMU_X86) - if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) - rom_address = 0xc0000; - else -#endif - return NULL; - } else { - /* Enable expansion ROM address decoding. */ - pci_write_config32(dev, PCI_ROM_ADDRESS, - rom_address|PCI_ROM_ADDRESS_ENABLE); - } - - printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n", - dev_path(dev), (unsigned long)rom_address); - rom_header = (struct rom_header *)rom_address; + /* Enable expansion ROM address decoding. */ + pci_write_config32(dev, PCI_ROM_ADDRESS, + rom_address|PCI_ROM_ADDRESS_ENABLE); }
+ printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n", + dev_path(dev), (unsigned long)rom_address); + rom_header = (struct rom_header *)rom_address; + printk(BIOS_SPEW, "PCI expansion ROM, signature 0x%04x, " "INIT size 0x%04x, data ptr 0x%04x\n", le32_to_cpu(rom_header->signature),