Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44501 )
Change subject: mb/google/volteer: Configure GPP_A19 and GPP_A20 as PAD_NC
......................................................................
Patch Set 2:
Native function pin mux for DPs are done by FSP after pin mux by gpio.c
So, we also need to configure below in overridetree.cb for not confuring DP_HPD1 and DP_HPD2.
register "DdiPort1Hpd" = "0"
register "DdiPort2Hpd" = "0"
Note that these are enabled in devicetree.cb in baseboard.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ia3245741b776b75073d2b43d36c8ea40b476b3ed
Gerrit-Change-Number: 44501
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