Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Chris Wang, Martin Roth, Karthik Ramasubramanian, Felix Held.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71562 )
Change subject: soc/amd/mendocino: add dxio_tx_vboost_enable for pcie optimization ......................................................................
Patch Set 2:
(7 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71562/comment/6988b2f6_ab5bf0e2 PS2, Line 7: soc/amd/mendocino: add dxio_tx_vboost_enable for pcie optimization Reading this, I thought it’s getting enabled. Maybe:
Hook up UPD dxio_tx_vboost_enable for PCIe optimization
https://review.coreboot.org/c/coreboot/+/71562/comment/3a10ad62_6ab0e4df PS2, Line 10: It will impact the PCIe signal integrity, need to double-confirm Please add a blank line between paragraphs or do not wrap lines too early.
https://review.coreboot.org/c/coreboot/+/71562/comment/9f158282_f353517a PS2, Line 10: need to double-confirm : the SI result after enabling this setting Can this be done before submitting this?
File src/soc/amd/mendocino/chip.h:
https://review.coreboot.org/c/coreboot/+/71562/comment/c34c28f2_89773e1b PS2, Line 167: w/a Why workaround?
https://review.coreboot.org/c/coreboot/+/71562/comment/56d7ec72_7bc09a08 PS2, Line 167: need to check PCIe signal integrity before enabling. 1. Please start sentences with capital letter. 2. Maybe rephrase:
> You should check the PCIe signal integrity before enabling this. 3. How can the integrity be checked? 4. If possible, please describe in more detail, what this option does.
https://review.coreboot.org/c/coreboot/+/71562/comment/f73d89c3_7efaa466 PS2, Line 167: set Set
https://review.coreboot.org/c/coreboot/+/71562/comment/26fcbc93_4ae575df PS2, Line 168: dxio_tx_vboost_enable Does *enable* need to be in the name? If yes, it’d put it in the front: `enable_dxio_tx_vboost`.