Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39359 )
Change subject: soc/intel/tigerlake: Save DIMM info by available nodes ......................................................................
Patch Set 2:
(2 comments)
+Karthik - Most likely this is not going to work for JSL.
Is that a problem? This code change is in a "tigerlake" directory. Of course, we can talk about whether the code can or cannot be shared with other platforms in the future, but I do not take this comment as challenging whether it is OK to commit as is.
https://review.coreboot.org/c/coreboot/+/39359/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39359/1//COMMIT_MSG@9 PS1, Line 9: TEST= make build image returns correct dimm info by mosys and dmidecode : with TGL-U and TGL-Y + MICA + LPDDR4
Can you verify if this works for volteer as well?
This TEST= line is copied from the original CL. I have tried compiling on the coreboot.org top of tree with this cherry-pick, but I have no idea what the "correct dimm info" would be. I cannot run the code on a Volteer device, because the coreboot.org repo is not yet in a state where it can boot on Volteer, that is what we are trying to get to.
https://review.coreboot.org/c/coreboot/+/39359/1/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/39359/1/src/soc/intel/tigerlake/rom... PS1, Line 75: MAX_NODE
Ah Thanks!
Ack