[coreboot-gerrit] Change in coreboot[master]: [DO-NOT-SUBMIT]: treeya: override edid for old AUO panel

[Peichao Li (Code Review)]

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38118 )

Change subject: [DO-NOT-SUBMIT]: treeya: override edid for old AUO panel
......................................................................

[DO-NOT-SUBMIT]: treeya: override edid for old AUO panel

Test only

BUG=NONE
TEST=NONE

Signed-off-by: Peichao.Wang 
Change-Id: I29a699ebd6c1a5e5a8ff1d2aa0882330ac51972a
---
M src/mainboard/google/kahlee/OemCustomize.c
M src/mainboard/google/kahlee/mainboard.c
2 files changed, 48 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/38118/1

diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 8e5d8eb..39bd4b1 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -102,4 +102,6 @@
    		(params->LvdsPowerOnSeqBlonToVaryBl)*4);
    }
    params->EDPv1_4VSMode = EDP_VS_HIGH_VDIFF_MODE;
+	if (IS_ENABLED(CONFIG_BOARD_GOOGLE_TREEYA))
+		params->DisplayMiscControl.Value |= 0x1; // Enable Int15 callback in VBIOS
 }
diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index 0173064..4fb8083 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -32,6 +32,9 @@
 #include <variant/ec.h>
 #include <variant/thermal.h>
 #include <vendorcode/google/chromeos/chromeos.h>
+#include <arch/interrupt.h>
+#include <x86emu/x86emu.h>
+#include <string.h>

/***********************************************************
  * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
@@ -83,6 +86,19 @@
    [0x78] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 };

+#if IS_ENABLED(CONFIG_BOARD_GOOGLE_TREEYA)
+const u8 target_edid_auo_b116xan06p1[128] = {
+	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x06, 0xAF, 0x5C, 0x61, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x1B, 0x01, 0x04, 0x95, 0x1A, 0x0E, 0x78, 0x02, 0x99, 0x85, 0x95, 0x55, 0x56, 0x92, 0x28,
+	0x22, 0x50, 0x54, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+	0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x66, 0x1C, 0x56, 0xA0, 0x50, 0x00, 0x19, 0x30, 0x30, 0x20,
+	0x46, 0x00, 0x00, 0x90, 0x10, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x41,
+	0x55, 0x4F, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFE,
+	0x00, 0x42, 0x31, 0x31, 0x36, 0x58, 0x41, 0x4E, 0x30, 0x36, 0x2E, 0x31, 0x20, 0x0A, 0x00, 0x06
+};
+#endif
+
 /*
  * This table defines the index into the picr/intr_data tables for each
  * device.  Any enabled device and slot that uses hardware interrupts should
@@ -114,6 +130,31 @@
    picr_data_ptr = mainboard_picr_data;
 }

+#if IS_ENABLED(CONFIG_BOARD_GOOGLE_TREEYA)
+static int int15_handler(void)
+{
+	int res = 0;
+	u8  *edidbuffer = (uint8_t*)(uint)((X86_ES <<4) + X86_DI);
+	printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n",
+			__func__, X86_AX, X86_BX, X86_CX, X86_DX);
+
+	switch(X86_EAX & 0xffff) {
+	case 0x4E08:
+		printk(BIOS_DEBUG, "VBIOS called\n");
+		if ((X86_EBX & 0x00ff) == 0x001b) {
+			printk(BIOS_DEBUG, "pass edid for override\n");
+			memcpy(edidbuffer, target_edid_auo_b116xan06p1 , sizeof(target_edid_auo_b116xan06p1));
+			X86_CX = sizeof(target_edid_auo_b116xan06p1);
+			X86_EAX = 0x4E00; // Function supported and successful.
+			res = 1;
+		}
+	break;
+
+	}
+	return res;
+}
+#endif
+
 static void mainboard_init(void *chip_info)
 {
    const struct sci_source *gpes;
@@ -129,6 +170,11 @@
    gpios = variant_gpio_table(&num_gpios);
    program_gpios(gpios, num_gpios);

+	if( boardid == 4) {
+#if IS_ENABLED(CONFIG_BOARD_GOOGLE_TREEYA)
+		mainboard_interrupt_handlers(0x15, &int15_handler);
+#endif
+	}
    /*
     * Some platforms use SCI not generated by a GPIO pin (event above 23).
     * For these boards, gpe_configure_sci() is still needed, but all GPIO