27 Apr
2023
27 Apr
'23
5:35 a.m.
Attention is currently required from: Matt DeVillier.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74809 )
Change subject: soc/amd/stoneyridge/acpi/sb_pci0_fch: report correct number of PCI buses ......................................................................
Patch Set 1:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175117): https://review.coreboot.org/c/coreboot/+/74809/comment/4aeef39e_0ec11f84 PS1, Line 9: This ports back commit commit d75ee46d3ce6 ("soc/amd/picasso/acpi: Possible repeated word: 'commit'
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I19153947cbb1b1b684291765eb1902caac65b9ec
Gerrit-Change-Number: 74809
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Held felix-coreboot@felixheld.de
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