[coreboot-gerrit] [S] Change in coreboot[master]: mb/google/nissa/var/uldren: Update DPTF parameters and tcc_offset

[Dtrain Hsu (Code Review)]

Attention is currently required from: Paul Menzel, Shou-Chieh Hsu, Tarun Tuli.

Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76105?usp=email )

Change subject: mb/google/nissa/var/uldren: Update DPTF parameters and tcc_offset
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Patch Set 2:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/76105/comment/ce54d729_539e131e :
PS1, Line 7: Modify
> That’s too broad. Please use a more specific verb.

Done

https://review.coreboot.org/c/coreboot/+/76105/comment/a45e6e3c_ebe44f82 :
PS1, Line 11:
> Please list/enumerate the changes.

Done

https://review.coreboot.org/c/coreboot/+/76105/comment/46acc222_0bf2ee86 :
PS1, Line 14: TEST=emerge-nissa coreboot chromeos-bootimage
> Don’t you need to boot it also and run some tests?

Done

File src/mainboard/google/brya/variants/uldren/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/76105/comment/1869dc79_9be9945d :
PS1, Line 109: 	register "tcc_offset" = "3"
> Please add a comment what value that actually results in.

Done