Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35383 )
Change subject: drivers/intel/fsp2_0: Allow platform to increase mem overhead ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35383/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35383/1//COMMIT_MSG@13 PS1, Line 13: AMD TSEG I'm curious. Why couldn't TSEG just be carved out of cbmem if it's not tied to the memory controller init at FSP-M time?
https://review.coreboot.org/c/coreboot/+/35383/1/src/drivers/intel/fsp2_0/me... File src/drivers/intel/fsp2_0/memory_init.c:
https://review.coreboot.org/c/coreboot/+/35383/1/src/drivers/intel/fsp2_0/me... PS1, Line 44: __weak size_t platform_mem_overhead_size(void) { return 0; } I'm curious to see your cbmem_top() implementation in dealing with this.