[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/pcie.c: Add missing pre-ASPM init

[Nico Huber (Code Review)]

Attention is currently required from: Paul Menzel, Angel Pons, Arthur Heymans.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47223 )

Change subject: nb/intel/haswell/pcie.c: Add missing pre-ASPM init
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Patch Set 9: Code-Review+2

(2 comments)

Patchset:

PS9: 
I forgot two times during review that it's about PEG (i.e. not
the PCH RPs). Defaults makes sense for PEG! ^^

File src/northbridge/intel/haswell/haswell.h:

https://review.coreboot.org/c/coreboot/+/47223/comment/32072c08_d14c213b 
PS9, Line 23: #define PEG_CAP		0xa2
I just realized, most of these are PCIe standard anyway, just
the base offset is implementation specific. Here, everything
is +0xa0. e.g.

PEG_CAP == 0xa0 + PCI_EXP_FLAGS,
    PEG_DCAP == 0xa0 + PCI_EXP_DEVCAP

etc.