John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42504 )
Change subject: Disable D3Code along with pass through mode ......................................................................
Disable D3Code along with pass through mode
The pass through mode(SW CM) RTD3 is not support until QS platform. D3Cold is needed to be disabled along with upstream TBT firmware.
BUG=b:159050315 TEST=Verfiy S0ix along with upstream TBT firmware.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I98ed991e4185abf1f3168e33b099e0e97c9075f6 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/42504/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 8cd926c..4bc8345 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -159,7 +159,7 @@
# D3Hot and D3Cold for TCSS register "TcssD3HotEnable" = "1" - register "TcssD3ColdEnable" = "1" + register "TcssD3ColdEnable" = "0"
# DP port register "DdiPortAConfig" = "1" # eDP