Attention is currently required from: Hung-Te Lin, Paul Menzel, Angel Pons, Jianjun Wang. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56792
to look at the new patch set (#19).
Change subject: soc/mediatek/mt8195: Add driver to configure PCIe ......................................................................
soc/mediatek/mt8195: Add driver to configure PCIe
Add a new function 'mtk_pcie_pre_init' to assert the PCIe reset at early stage to reduce the impact of 100ms delay.
TEST=Build pass and boot up to kernel successfully via SSD on Cherry board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x1987 PCI SSVID : 0x1987 SN : 28F40713077B0012602 MN : Phison ESE1A043-X28 RAB : 0x1 AERL : 0x3 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model Phison ESE1A043-X28
BUG=b:178565024
Signed-off-by: Jianjun Wang jianjun.wang@mediatek.com Change-Id: If6799c53b03a33be91157ea088d829beb4272976 --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/include/soc/pcie.h A src/soc/mediatek/mt8195/pcie.c 3 files changed, 112 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/56792/19