[coreboot-gerrit] Change in coreboot[master]: soc/mediatek: PCI: Assert PERST# at bootblock stage

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Shelley Chen, Rex-BC Chen, Paul Menzel, Angel Pons, Jianjun Wang.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 )

Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage
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Patch Set 17:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62359/comment/85f16600_08a77216 
PS9, Line 14: 100ms
I'm fine with this solution.
> Seems much longer than 100ms

Did you use the image with or without serial console?