[coreboot-gerrit] Change in coreboot[master]: mb/google/volteer: Add firmware configuration for MAX98373_ALC5682I_I...

[Kevin Cheng (Code Review)]

Kevin Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44560 )

Change subject: mb/google/volteer: Add firmware configuration for MAX98373_ALC5682I_I2S_UP4
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44560/4/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/fw_config.c:

https://review.coreboot.org/c/coreboot/+/44560/4/src/mainboard/google/voltee... 
PS4, Line 55: 	PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2),	/* I2S1_RXD */
            : 	PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2),	/* I2S1_TXD */
            : 	PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2),	/* I2S1_SFRM *
> I set R5,R6,R7 as NC pin at first. […]

The up4 design only use I2S0 and I2S2. The I2S1 pins are define for different function in project. It will impact other project when it configure here as a common path for all up4 design. I saw you also program the R5, R6, R7 in cb:44409 gpio.c. Can we leave these pins there? and why other I2S2 pins didn't need here and only in gpio.c?