[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.

[Cliff Huang (Code Review)]

Attention is currently required from: Bora Guvendik, Lance Zhao, Anil Kumar K, Subrata Banik, Tim Wawrzynczak, Paul Menzel, Thejaswani Putta, Patrick Rudolph.
Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61352 )

Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
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Patch Set 5:

(1 comment)

File src/soc/intel/common/block/pcie/rtd3/rtd3.c:

https://review.coreboot.org/c/coreboot/+/61352/comment/8d467f1d_b9656c65 
PS5, Line 336:  || pcie_rp > CONFIG_MAX_ROOT_PORTS
> wasn't this part removed recently? […]

I think so, will fix this. Good catch.