Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32734 )
Change subject: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF
......................................................................
Patch Set 80:
(5 comments)
https://review.coreboot.org/c/coreboot/+/32734/68//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/32734/68//COMMIT_MSG@12
PS68, Line 12: * SeaBios payload
: * LinuxBoot payload
master
Done
https://review.coreboot.org/c/coreboot/+/32734/68//COMMIT_MSG@15
PS68, Line 15: PCIe
Does PEG work with Gen3?
Ack
https://review.coreboot.org/c/coreboot/+/32734/68//COMMIT_MSG@25
PS68, Line 25: Please apply those patches as well for good user experience:
:
: I456be647b159f7a2ea7d94986a24424e56dcc8c4
: I22c6885eae6fd7c778ac37b18f95b8775e9064e3
: Ica0c20255f661dd61edc3a7d15646b7447c4658e
How do you add comments to the commit message?
Done
https://review.coreboot.org/c/coreboot/+/32734/72/src/mainboard/supermicro/x...
File src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/32734/72/src/mainboard/supermicro/x...
PS72, Line 234: ca2.0
it's the default IPMI I/O KCS port. Have a look at dmidecode or ACPI tables to find this value.
Done
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x...
File src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x...
PS74, Line 239: device pnp 2e.0 off end
This device doesn't seem to exist
Done
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