Lee Leahy has uploaded a new change for review. ( https://review.coreboot.org/19008 )
Change subject: drivers/storage: Support PCI SD/MMC controllers ......................................................................
drivers/storage: Support PCI SD/MMC controllers
Add support to initialize a PCI controller.
TEST=Build and run on reef
Change-Id: If38b0de989a3c71f7f84ddf0f1ea9d1b95f2fa7b Signed-off-by: Lee Leahy Leroy.P.Leahy@intel.com --- M src/drivers/storage/Makefile.inc A src/drivers/storage/pci_sdhci.c M src/include/device/sdhci.h 3 files changed, 89 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/19008/1
diff --git a/src/drivers/storage/Makefile.inc b/src/drivers/storage/Makefile.inc index 79957ac..36d7e87 100644 --- a/src/drivers/storage/Makefile.inc +++ b/src/drivers/storage/Makefile.inc @@ -16,6 +16,7 @@ ifeq ($(CONFIG_DRIVERS_STORAGE),y)
ramstage-y += mmc.c +ramstage-y += pci_sdhci.c ramstage-y += sdhci.c
endif # CONFIG_DRIVERS_STORAGE diff --git a/src/drivers/storage/pci_sdhci.c b/src/drivers/storage/pci_sdhci.c new file mode 100644 index 0000000..0805d40 --- /dev/null +++ b/src/drivers/storage/pci_sdhci.c @@ -0,0 +1,84 @@ +/* + * Copyright 2013 Google Inc. + * Copyrigit 2017 Intel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <assert.h> +#include <console/console.h> +#include <device/sdhci.h> +#include <string.h> + +#include "storage.h" + + +/* Initialize an SDHCI port */ +int sdhci_host_init(SdhciHost *host, void *ioaddr, int platform_info, + int clock_min, int clock_max, int clock_base) +{ + memset(host,0,sizeof(*host)); + host->ioaddr = ioaddr; + host->clock_f_min = clock_min; + host->clock_f_max = clock_max; + host->clock_base = clock_base; + + /* Handle the controller quirks */ + if (platform_info & SDHCI_PLATFORM_REMOVABLE) + host->removable = 1; + if (platform_info & SDHCI_PLATFORM_NO_EMMC_HS200) + host->quirks |= SDHCI_QUIRK_NO_EMMC_HS200; + if (platform_info & SDHCI_PLATFORM_EMMC_1V8_POWER) + host->quirks |= SDHCI_QUIRK_EMMC_1V8_POWER; + if (platform_info & SDHCI_PLATFORM_SUPPORTS_HS400ES) + host->quirks |= SDHCI_QUIRK_SUPPORTS_HS400ES; + if (platform_info & SDHCI_PLATFORM_NO_CLK_BASE) { + host->quirks |= SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; + host->clock_base = clock_max; + } + + return add_sdhci(host); +} + +SdhciHost *new_mem_sdhci_host(void *ioaddr, int platform_info, int clock_min, + int clock_max, int clock_base) +{ + SdhciHost *host; + + host = malloc(sizeof(*host)); + if (host == NULL) + return NULL; + + if (sdhci_host_init(host, ioaddr, platform_info, clock_min, clock_max, + clock_base)) + free(host); + return host; +} + +SdhciHost *new_pci_sdhci_host(uint32_t dev, int platform_info, int clock_min, + int clock_max, int clock_base) +{ + uint32_t addr; + + addr = pci_read_config32(dev, PCI_BASE_ADDRESS_0); + if (addr == ((uint32_t)~0)) { + printk(BIOS_DEBUG,"%s: Error: PCI SDHCI not found\n", + __func__); + return NULL; + } + + addr &= ~0xf; + return new_mem_sdhci_host((void *)addr, platform_info, clock_min, + clock_max, clock_base); +} diff --git a/src/include/device/sdhci.h b/src/include/device/sdhci.h index 55aa559..631d711 100644 --- a/src/include/device/sdhci.h +++ b/src/include/device/sdhci.h @@ -361,6 +361,8 @@ }
int add_sdhci(SdhciHost *host); +int sdhci_host_init(SdhciHost *host, void *ioaddr, int platform_info, + int clock_min, int clock_max, int clock_base);
typedef uint32_t pcidev_t;
@@ -368,7 +370,8 @@ SdhciHost *new_pci_sdhci_host(pcidev_t dev, int platform_info, int clock_min, - int clock_max); + int clock_max, + int clock_base);
/* Add SDHCI controller with memory address */ SdhciHost *new_mem_sdhci_host(void *ioaddr,