[coreboot-gerrit] [XS] Change in coreboot[main]: lib,soc/intel/common/block/smbus: Use a SPD length of 512 bytes for DDR5

[Tim Crawford (Code Review)]

Attention is currently required from: Jeremy Soller, Paul Menzel.

Tim Crawford has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/75283?usp=email )

Change subject: lib,soc/intel/common/block/smbus: Use a SPD length of 512 bytes for DDR5
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Patch Set 3: Code-Review+2