[coreboot-gerrit] Change in ...coreboot[master]: mb/google/hatch: Set UPD to unlock GPP_A12 to use as FPMCU_RST

[Krishna P Bhat D (Code Review)]

Hello Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32110

to look at the new patch set (#2).

Change subject: mb/google/hatch: Set UPD to unlock GPP_A12 to use as FPMCU_RST
......................................................................

mb/google/hatch: Set UPD to unlock GPP_A12 to use as FPMCU_RST

GPP_A12 is being GPIO padlocked and cannot used in kernel. Unlock the
GPIO pads to export this pin in kernel to be used as FPMCU_RST.
GPP_A_12 has a Native3 (SX_EXIT_HOLDOFF#) mode, which allows to delay
resuming to S0. If this pad is not locked and platform was not initially
designed for this functionality, malware could reconfigure this pads
setting under OS (switch to Native3), which would make platform not able
to resume until G3 is applied. To prevent misuse of this pad,
re-configure this pad before entering S3 and S5 to guarantee that the
pad configuration is correct.

BUG=b:128686027

Change-Id: Iad9e8a209dc3f8ca0c994e8c1da329918409a1d4
Signed-off-by: Krishna Prasad Bhat 
---
M src/mainboard/google/hatch/variants/baseboard/gpio.c
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 9 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/32110/2