[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Void MRC cache if CPU differs

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39734 )

Change subject: nb/intel/sandybridge: Void MRC cache if CPU differs
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39734/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/39734/2//COMMIT_MSG@7 
PS2, Line 7: CPU
CPU generations?
It would still fail if a SandyBridge CPU was replaced with a SandyBridge CPU.