[coreboot-gerrit] Change in coreboot[master]: cpu/intel/microcode: Replace numbers with macros

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/28784

Change subject: cpu/intel/microcode: Replace numbers with macros
......................................................................

cpu/intel/microcode: Replace numbers with macros

Change-Id: I849dd406f5ccc733d4957eaf1c774745782f531a
Signed-off-by: Elyes HAOUAS 
---
M src/cpu/intel/microcode/microcode.c
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/28784/1

diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 8cfcb95..0dd9a5b 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -103,7 +103,7 @@

msr.lo = (unsigned long)m + sizeof(struct microcode);
    msr.hi = 0;
-	wrmsr(0x79, msr);
+	wrmsr(IA32_BIOS_UPDT_TRIG, msr);

#if !defined(__ROMCC__)
    printk(BIOS_DEBUG, "microcode: updated to revision "
@@ -162,9 +162,9 @@
    /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
    msr.lo = 0;
    msr.hi = 0;
-	wrmsr(0x8B, msr);
+	wrmsr(IA32_BIOS_SIGN_ID, msr);
    eax = cpuid_eax(1);
-	msr = rdmsr(0x8B);
+	msr = rdmsr(IA32_BIOS_SIGN_ID);
    rev = msr.hi;
    x86_model = (eax >> 4) & 0x0f;
    x86_family = (eax >> 8) & 0x0f;
@@ -172,7 +172,7 @@

pf = 0;
    if ((x86_model >= 5) || (x86_family > 6)) {
-		msr = rdmsr(0x17);
+		msr = rdmsr(IA32_PLATFORM_ID);
    	pf = 1 << ((msr.hi >> 18) & 7);
    }
 #if !defined(__ROMCC__)