[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/xeon_sp: Fix PCH IOAPIC ID

[Patrick Rudolph (Code Review)]

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Tim Chu.

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73390 )

Change subject: soc/intel/xeon_sp: Fix PCH IOAPIC ID
......................................................................

soc/intel/xeon_sp: Fix PCH IOAPIC ID

FSP does not program the ID as it's configured to.

Read IOAPIC ID from hardware instead of using some define that
might not reflect how hardware is configured.

Change-Id: Ia91cb4aef9d15520b8b3402ec10e7b0a4355caeb
Signed-off-by: Patrick Rudolph 
---
M src/soc/intel/xeon_sp/nb_acpi.c
1 file changed, 20 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/73390/1

diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c
index 89deb88..af53ebb 100644
--- a/src/soc/intel/xeon_sp/nb_acpi.c
+++ b/src/soc/intel/xeon_sp/nb_acpi.c
@@ -2,6 +2,7 @@

#include <acpi/acpigen.h>
 #include <arch/hpet.h>
+#include <arch/ioapic.h>
 #include <assert.h>
 #include <cbmem.h>
 #include <cpu/x86/lapic.h>
@@ -223,10 +224,10 @@
    if (socket == 0 && stack == CSTACK) {
    	union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf();
    	printk(BIOS_DEBUG, "    [IOAPIC Device] Enumeration ID: 0x%x, PCI Bus Number: 0x%x, "
-			"PCI Path: 0x%x, 0x%x\n",
-		       PCH_IOAPIC_ID, ioapic_bdf.bus, ioapic_bdf.dev, ioapic_bdf.fn);
-		current += acpi_create_dmar_ds_ioapic(current, PCH_IOAPIC_ID,
-						      ioapic_bdf.bus, ioapic_bdf.dev, ioapic_bdf.fn);
+		       "PCI Path: 0x%x, 0x%x\n", get_ioapic_id(VIO_APIC_VADDR), ioapic_bdf.bus,
+		       ioapic_bdf.dev, ioapic_bdf.fn);
+		current += acpi_create_dmar_ds_ioapic_from_hw(current,
+				IO_APIC_ADDR, ioapic_bdf.bus, ioapic_bdf.dev, ioapic_bdf.fn);
    }

// Add IOAPIC entry