[coreboot-gerrit] Change in coreboot[master]: soc/intel/{apl, cnl, skl}: Add sanity check of SA_PCIEX_LENGTH_MIB

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40337 )

Change subject: soc/intel/{apl, cnl, skl}: Add sanity check of SA_PCIEX_LENGTH_MIB
......................................................................

soc/intel/{apl, cnl, skl}: Add sanity check of SA_PCIEX_LENGTH_MIB

Not all IA SoC has provision for higher PCIEXBAR length hence added
required check inside SoC to avoid wrong length programming.

TEST=Select PCIEX_LENGTH_4096MB config in Cannonlake Kconfig file
and build causes compilation error.

Change-Id: I0dd67868df373c6ab5c724a21371bcc206968036
Signed-off-by: Subrata Banik 
---
M src/soc/intel/apollolake/systemagent.c
M src/soc/intel/cannonlake/systemagent.c
M src/soc/intel/skylake/systemagent.c
3 files changed, 12 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/40337/1

diff --git a/src/soc/intel/apollolake/systemagent.c b/src/soc/intel/apollolake/systemagent.c
index f564e8f..27686ee 100644
--- a/src/soc/intel/apollolake/systemagent.c
+++ b/src/soc/intel/apollolake/systemagent.c
@@ -23,6 +23,10 @@
 #include <soc/iomap.h>
 #include <soc/systemagent.h>

+#if (CONFIG_SA_PCIEX_LENGTH_MIB > 0x100) /* Max length is 256MB */
+#error "Invalid SA_PCIEX_LENGTH_MIB selection!"
+#endif
+
 /*
  * SoC implementation
  *
diff --git a/src/soc/intel/cannonlake/systemagent.c b/src/soc/intel/cannonlake/systemagent.c
index 54b16e2..9f56890 100644
--- a/src/soc/intel/cannonlake/systemagent.c
+++ b/src/soc/intel/cannonlake/systemagent.c
@@ -12,6 +12,10 @@
 #include <soc/systemagent.h>
 #include "chip.h"

+#if (CONFIG_SA_PCIEX_LENGTH_MIB > 0x100) /* Max length is 256MB */
+#error "Invalid SA_PCIEX_LENGTH_MIB selection!"
+#endif
+
 /*
  * SoC implementation
  *
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index 10d79d3..22a764a 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -14,6 +14,10 @@
 #include <soc/systemagent.h>
 #include "chip.h"

+#if (CONFIG_SA_PCIEX_LENGTH_MIB > 0x100) /* Max length is 256MB */
+#error "Invalid SA_PCIEX_LENGTH_MIB selection!"
+#endif
+
 bool soc_is_vtd_capable(void)
 {
    struct device *const root_dev = pcidev_path_on_root(SA_DEVFN_ROOT);